Author:-Â Abhinav VS
Abstract:-Â In this project, a 1st order single-loop single-bit digital sigma-delta modulator is designed. In this project, a 1 bit ADC is used in conjunction with a Difference Amplifier, integrator, and DAC in feedback. As an ADC, a two-stage comparator is employed. Because of this design of anti aliasing filter, oversampling and noise shaping technologies are used. Tanner is also used to validate the design's behavioural simulations. A top-down system design technique is offered to estimate the degree of effect of modulator structural factors on modulator performance. This technique not only gives crucial guidance for implementing the modulator in an FPGA processor, but it also decreases design complexity and shortens the integrated circuit (IC) design time.
Keywords:-Â FPGA, DAC, ADC, Sigma-Delta modulator, Oversampling.
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