Abstract
In order to prevent the power switching devices (e.g., the Insulated-Gate-Bipolar-Transistor, IGBT) from shooting through in voltage source converter during a switching period, a dead- time is inserted in between the off going and turning on devices, either in the hardware drivers of the IGBTs or implemented in the software Sinusoidal Pulse-Width Modulation (SPWM) scheme. Both methods will lead to a degradation of the injected current power quality. This paper will present a dead-time elimination scheme for a SPWM controlled inverter. In comparison to using expensive current sensor, this method determines precisely the load of current polarity by detecting the terminal voltage of the anti-parallel diode of power devices. The presented scheme includes the freewheeling current polarity detection circuit and the PWM control generator without dead-time. This method significantly reduces the output voltage loss and harmonic distortion, and improves quality of power. Simulation results are given to demonstrate the effectiveness of the dead-time elimination scheme.
Keywords: Dead time, PWM, Sinusoidal Pulse Width Modulation (SPWM), Harmonics
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