In-Memory Computing Architectures for Embedded AI: A Comprehensive Survey of Emerging Non-Volatile Memory Technologies, Circuit Paradigms, and System Integration

Abstract

The relentless evolution of deep neural networks (DNNs) and edge artificialintelligence (Edge AI) applications has exposed severe energy and bandwidth bottlenecks inherent in conventional Von-Neumann computer architectures. The constant shuttling of high-volume network weight matrices and intermediate activation tensors between spatially separated Processing Units (CPUs/GPUs) and off-chip Dynamic Random-Access Memory (DRAM) gives rise to the infamous 'memory wall', consuming up to 80% of total system power. In-Memory Computing (IMC) has emerged as a radical paradigm shift that bypasses this architectural throughput limitation by executing vector-matrix multiplications (VMM)—the primary mathematical primitives of machine learning—directly within memory arrays using physical laws such as Kirchhoff’s Current Law and Ohm’s Law. This review paper provides a rigorous and exhaustive examination of the state-of-the-art in IMC architectures tailored for resource-constrained embedded systems. We analyze both volatile static random-access memory (SRAM) and emerging non-volatile memory (NVM) devices, including Resistive RAM (ReRAM), Phase-Change Memory (PCM), Magnetoresistive RAM (MRAM), and Ferroelectric Field-Effect Transistors (FeFET). Furthermore, we detail circuit-level implementation strategies across analog, digital, and mixed-signal domains, evaluate peripheral Analog-to-Digital Converter (ADC) overheads, examine non-ideal device properties, and review hardware-software co-design frameworks. Finally, we establish quantitative benchmark metrics, identify critical research gaps, and chart out prospective directions for industrial hardware deployment. KEYWORDS: In-Memory Computing (IMC), Embedded AI, Edge Computing,Non-Volatile Memory (NVM), Resistive RAM (ReRAM), Ferroelectric FET(FeFET), Vector-Matrix Multiplication (VMM), Memory Wall, HardwareAccelerators.