Journal of Research in Electrical Circuits and Systems ISSN: 3139-2059 (Online)

Authors: R. Mohan, S. Abinaya

Abstract: NULL convention logic (NCL) is a promising design paradigm for constructing low-power robust asynchronous circuits. The conventional NCL paradigm requires pipeline registers for separating two neighboring logic blocks, and those registers can account for up to 35% of the overall power consumption of the NCL circuit. This brief presents the register-less NULL convention logic (RL-NCL) design paradigm, which achieves low power consumption by eliminating pipeline registers, simplifying the control circuit, and supporting fine-grain power gating to mitigate the leakage power of sleeping logic blocks. Compared with the conventional NCL counterpart, the
RL-NCL implementation of an eight-bit five-stage pipelined Kogge-Stone adder can reduce power dissipation by 56.4-72.5% . Moreover, the RL-NCL implementation can reduce the gates count of the adder by 49.5%.

Keywords: Asynchronous circuits, low-power electronics, null convention
logic, power gating