Journal of Research in Electrical Circuits and Systems ISSN: 3139-2059 (Online)

Authors: S. Murugan, A. Revathi

Abstract: The growing demand for portable, battery-powered, and environmentally sustainable electronic systems has placed energy efficiency at the forefront of logic circuit design. Logic circuits constitute the fundamental building blocks of digital systems, and their power consumption significantly impacts overall system performance and battery life. Energy-efficient logic circuit design aims to minimize power dissipation while maintaining required speed, functionality, and reliability. This paper presents a comprehensive study of energy-efficient logic circuit design techniques, including power dissipation mechanisms, logic styles, voltage scaling, clock gating, and architectural optimizations. Comparative tables and two-dimensional figures are included to aid understanding. The paper provides a structured overview suitable for students, researchers, and engineers involved in low-power and energy-aware digital design.

Keywords: Energy-efficient design, logic circuits, low-power VLSI, dynamic power, leakage power, CMOS logic