Journal of Research in Electrical Circuits and Systems ISSN: 3139-2059 (Online)

Abstract

This research aims to testing of digital circuits. By using fault models at the lower levels, testing becomes cumbersome and will lead to delays in the design cycle. Thus there is a need to look for a new approach of testing the circuits at higher levels to speed up the design cycle. Different methods are implemented to detect the faults such as stuck-at faults in RTL circuits. A digital circuit usually comprises a controller and data path.

The time spent for determining a valid controller behavior to detect a fault usually dominates test generation time. A validation test set is used to verify controller behavior and, hence, it activates various controller behaviors. In this paper, different methods are presented for detecting faults in the data path thus, resulting in the detection of a majority of stuck-at faults in the data path RTL modules

Keywords: stuck-at faults;      fault coverage; data structure; validation test sets