Multi-Layer Carbon Nanotube Interconnect Fabrication for UltraDense Vlsi Systems

Abstract

ABSTRACT: Carbon nanotube (CNT)–based interconnects have emerged as a compelling alternative to copper due to their significant advantages in current-carrying capacity, electromigration resistance, thermal stability, and scaling feasibility. This paper presents a detailed investigation of multilayer CNT interconnect fabrication strategies compatible with advanced CMOS nodes below 5 nm. The proposed approach integrates aligned CNT bundles with low-temperature plasma deposition and optimized catalyst patterning to achieve uniform density and reduced contact resistance. Electrical characterization demonstrates nearballistic electron transport over micron-scale distances, while thermal measurements confirm superior heat dissipation compared to copper lines under identical current stress. The study also evaluates integration challenges, including via resistance, interface adhesion, and process variability. Simulation results using a hierarchical VLSI model show that multilayer CNTs can reduce global interconnect delay by up to 38% and improve reliability lifetime by a factor of six. This work establishes a robust pathway toward CNT-enabled ultra-dense interconnect architectures for next-generation nanoelectronic systems.

KEYWORDS: Carbon nanotubes, Interconnects, Nanoelectronics, VLSI scaling, Electromigration